Forum Discussion
Ohad_H_Intel
New Contributor
New ContributorHow do I integrate my RTL design with OpenCL kernel synthesis results into one AFU (one gbs file)?
I want to create one FPGA version (one gbs file) that will consist of my RTL files and an OpenCL file that will accelerate into the FPGA (by OpenCL Kernel compiler). How can i do it?
KennyT_altera
Super Contributor
Super ContributorYou can try modify the ref design to suite your needs. You can look into https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/opencl-bsp-support.html for more information
Ohad_H_IntelNew Contributor
New ContributorThank you!
