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User1582192733150209
Occasional Contributor
Occasional ContributorHow can I know if e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt be included in compilation of original vendor design example eth_e2e_e10?
Hello Sir/Madam, I am running the original vendor design example eth_e2e_e10 on Intel PAC aria10gx. I wonder the 2 design file e10_avl_st_gen.v and e10_avl_st_mon.v in filelist.txt were not inclu...
JohnT_Altera
Regular Contributor
Regular ContributorHi,
Avalon_st_gen.v is the Avalon ST Generator and Avalon_st_mon.v is the monitor IP. It is a IP used to performed traffic validation on your system.
The e10_avl_st_gen.v and e10_avl_st_mon.v is the high level design which will call the the Avalon_st_gen.v and avalon_st_mon.v file in order to incorporate the Ethernet validation using the Avalon ST packet.
