HBM - high band memory
Hi,
I tried to generate an HBM memory example module when my device is Stratix 10.
I have two projects:
One where the HBM is located at the top, and another where the HBM is located at the bottom.
Both projects are configured in the same way: only channel 0 (ch0) is used.
The project with the HBM located at the bottom works, and Quartus successfully completes all stages up to the "Generate Programming Files" stage.
However, the project with the HBM located at the top fails during the Plan stage, and I receive the following message:
Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 UFIND4H_UIB(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error(175001): The Fitter cannot place 1 UFIND4H_UIB, which is within High Bandwidth Memory (HBM2) Interface Intel FPGA IP ed_synth_hbm_0_example_design_altera_hbm_1961_juniqfi.
Info(14596): Information about the failing component(s):
Info(175028): The UFIND4H_UIB name(s): hbm_0_example_design|hbm_0_example_design|uib|arch_inst|ufi_inst|ufi_inst
Error(16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below:
Error(175006): There is no routing connectivity between source HBMC and the UFIND4H_UIB
Info(175026): Source: HBMC hbm_0_example_design|hbm_0_example_design|uib|arch_inst|hbmc_inst|hbmc_inst
Info(175021): The source HBMC was placed in location HBMC_X95_Y2_N1
Error(175022): The UFIND4H_UIB could not be placed in any location to satisfy its connectivity requirements
Info(175029): 1 location affected
Info(175029): UFIND4HUIB_X95_Y292_N0
Could you assist how can I solve it ?