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Atul_Ghalame's avatar
Atul_Ghalame
Icon for New Contributor rankNew Contributor
4 years ago

FPGA DDR memory access before OpenCL aocx loading

Hi all, We want to access DDR memory of Arria-10 FPGA by OpenCL host code but before the loading of binary image (.aocx). 1. Is it possible to allocate memory when FPGA is just powered on? 2. ...
aikeu's avatar
aikeu
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi Atul_Ghalame,


I’m glad that your question has been addressed, If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

Thanks again to community user HRZ for the support in thread.

I will close this thread for now.


Thanks.

Regards,

Aik Eu