Forum Discussion
PRavi7
New Contributor
New ContributorEviction policy of burst-coalesced cached non-aligned LSU's cache
Hi, I am implementing an application using OpenCL targeting Intel Arria 10 GX 1150. typedef struct {
char data[8];
} block;
block buf;
while(true) {
global_ptr = some_complex_address_calc...
KhaiChein_Y_Intel
Regular Contributor
Regular ContributorHi,
The cache size depends on the memory size that you would like to access. If you are using the built-in calls that you can use for loading from and storing to global memory, you have to define using the Argument #2 of the Load Built-in. May I know which eviction policy you are referring to?
Thanks.
