Forum Discussion

tde_m's avatar
tde_m
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

ESB error in synthesizing a design

Hello, I'm trying to compile a (quite large) OpenCL design for Stratix 10, using Quartus v19.1. After a couple of hours of synthesis, the compiler fails by reporting the following error Error (170...
MEIYAN_L_Intel's avatar
MEIYAN_L_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi,

Based on the error number: 170019, I found an information in link below:

https://www.intel.com/content/www/us/en/programmable/quartushelp/current/index.htm#msgs/msgs/efitapi_fitapi_vpr_status_failed_too_many_rams.htm

In the error message stated that the design memory utilization is too large for the selected device. Hence, you would need to reduce the design.

For more information in memory optimization in OpenCL, you may need to refer the link below:

https://www.intel.com/content/www/us/en/programmable/support/training/course/oopnclmemopt.html

Thanks

tde_m's avatar
tde_m
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Thanks! This clarifies the error message!