Forum Discussion
ContributorError running DLA Benchmark
Hello,
I am working with Intel FPGA AI suite on a Intel Arria 10 SoC Dev Board.
I tried to run DLA benchmark several times and I receive the following messages after some inferences:
"void MmdWrapper::WriteToDDR(int, uint64_t, uint64_t, const void*) const: Assertion `status == 0' failed"
The error comes after run the benchmark about 400 times
Intel FPGA AI Suite version: 2023.2 Running custom NN over A10_FP16_Performance.arch example.
Could anyone help me to avoid this problem?
Thank you in advance.
21 Replies
JohnT_AlteraRegular Contributor
Hi,
Just would like to clarify, your issue only observed after running 400 times? May I know which bitstream and which NN model are you using?
Please also provide me your board setup and DDR used?
- JohnT_Altera
Hi,
May I know if you have the information requested?
- JohnT_Altera
Hi RubenPadial,
Do you have update on this?
Thanks
RubenPadialHello @JohnT_Intel
The problem comes after 400 dla benchmark execution approximately as I mentioned in the first message. I used the A10_FP16_Performance architecture to build the bitstream and a custom CNN.
I'm using Arria10 SoC Dev Kit with default memory configuration.
- JohnT_Altera
Hi,
Can you share with me the step you use to generate the bitstream, board setup including memory used and if possible share with me your bitstream and model so that I can try to duplicate from my side to understand the issue?
- RubenPadial
Hello @JohnT_Intel,
To generate the bitstream, you can follow the Intel FPGA AI Suite. SoC Design Example User Guide by changing the architure. You can find the IR for the NN in this link
- JohnT_Altera
Hi,
May I know which DDR memory are you using in your setup? I am facing issue to download the file with the link you provided
- RubenPadial
Hello @JohnT_Intel ,
Try again in this link. I'm using the default DDR configuration for Arria10 SoC Dev Kit: https://www.intel.la/content/www/xl/es/products/details/fpga/development-kits/arria/10-sx.html
- JohnT_Altera
HI,
Just to confirm, you are using the HILO board shipped with the dev kit? Let me know if you are using different memory. Please also confirm you are using the correct memory on HPS and FPGA memory.
- HPS memory size (HiLo card):
- 2 GB DDR3 (256 Mb x 40 x dual rank)
- 1 GB DDR3 (256 Mb x 40 x single rank)
- 1 GB DDR4 (256 Mb x 40 x single rank) - ships with kit
- FPGA memory size (HILO Card):
- 4 GB DDR3 (256Mb x72 x dual rank)
- 2 GB DDR3 (256Mb x72 x single rank)
- 2 GB DDR4 (256Mb x 72 x single rank) - ships with kit
- 16 MB QDRV (4Mb x 36)
- 128 MB RLDRAM3(16Mb x 72)
- HPS memory size (HiLo card):
- RubenPadial
Hello @JohnT_Intel,
Yes, I'm using the HILO cards shipped with the dev kit.
Both are "ALTERA DDR4 x72 DAUGHTER CARD" - JohnT_Altera
Hi,
Are you running M2M or S2M? Can you confirm FPGA is connected to 2GB RAM and HPS is 1GB RAM?
- RubenPadial
Hello @JohnT_Intel,
Both HILO cards seems to be equal. Any tip to know the memory size?
HPS "grep MemTotal /proc/meminfo" --> MemTotal: 1025000 kB
- JohnT_Altera
HI,
Have you try with the prebuilt bitstream and sdcard image (https://www.intel.com/content/www/us/en/docs/programmable/768979/2024-3/writing-the-sd-card-image-wic-to-an-sd-card.html)?
