Forum Discussion
Doing low bit-width fixed precision FMA on DSP in OpenCL
- 7 years ago
The appropriate IP Core is either directly used by the OpenCL compiler, or eventually employed by the mapper depending on the width of your variables. I remember there were some topics in the forum about this subject before and the compiler's behavior was kinda buggy, though. You can also take a look at the variable-width integer extension and the instructions for correctly inferring fixed-point arithmetic in the Best Practices Guide.
The most complex operation you can do using one Arria 10/Stratix 10 DSP is an "18 × 18 Sum of 2 fixed-point" operation. You cannot do more than one FMA per DSP on these devices regardless of bit-width since each DSP has only one adder and FP32 FMA is the only natively-supported FMA operation. You can refer to "Intel® Arria® 10 Native Fixed Point DSP IP Core User Guide" and "Intel® Stratix® 10 Variable Precision DSP Blocks User Guide" for more info.
P.S. You might be able to manually pack multiple low-bit-width FMAs into one 32-bit FMA by inserting zeroes between the numbers and using bit masking, but there is no guarantee you would get the intended DSP packing in the end.