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AAlmo's avatar
AAlmo
Icon for New Contributor rankNew Contributor
6 years ago

DE5a-Net-DDR4 Compilation Problem?

Hey,

l have a DE5a-Net-DDR4 board installed on my system. I’m trying to compile a simple OpenCL code, but always got error message. i double check that all environment settings are correct. The error message displayed after approximately 25 minutes from the starting compilation process. below is a sample output with errors message displayed :

[root@localhost clfiles]# aoc -g -v -fp-relaxed Sobel_lrg1_v11_optm4p.cl -report

aoc: Environment checks are completed successfully.

aoc: Cached files in /var/tmp/aocl/user1 may be used to reduce compilation time

You are now compiling the full flow!!

aoc: Selected default target board de5a_net_ddr4

aoc: Running OpenCL parser....

aoc: OpenCL parser completed successfully.

aoc: Optimizing and doing static analysis of code...

aoc: Linking with IP library ...

Checking if memory usage is larger than 100%

!===========================================================================

! The report below may be inaccurate. A more comprehensive

! resource usage report can be found at Sobel_lrg1_v11_optm4p/reports/report.html

!===========================================================================

+--------------------------------------------------------------------+

; Estimated Resource Usage Summary ;

+----------------------------------------+---------------------------+

; Resource + Usage ;

+----------------------------------------+---------------------------+

; Logic utilization ; 50% ;

; ALUTs ; 34% ;

; Dedicated logic registers ; 19% ;

; Memory blocks ; 34% ;

; DSP blocks ; 24% ;

+----------------------------------------+---------------------------;

aoc: First stage compilation completed successfully.

Compiling for FPGA. This process may take a long time, please be patient.

Error (17941): The design could not be loaded due to errors.

Error: design::import_design -file base.qdb -overwrite failed!

Error (23031): Evaluation of Tcl script /home/intelFPGA_pro/17.1/quartus/common/tcl/internal/qatm_import_design.tcl unsuccessful

Error: Quartus Prime Compiler Database Interface was unsuccessful. 3 errors, 4 warnings

Error (23031): Evaluation of Tcl script import_compile.tcl unsuccessful

Error: Quartus Prime Compiler Database Interface was unsuccessful. 1 error, 0 warnings

Error: Compiler Error, not able to generate hardware

Always got this error,

below are ssome environment :

[root@localhost bringup]# which aoc

/home/intelFPGA_pro/17.1/hld/bin/aoc

[root@localhost bringup]# which quartus

/home/intelFPGA_pro/17.1/quartus/bin/quartus

I appreciate If i can get some help to solve this issue. Any suggestions? Is it because of license file is not the right one, l don’t thinks so as it is working if I add -c option.

4 Replies

    • AAlmo's avatar
      AAlmo
      Icon for New Contributor rankNew Contributor
      6 years ago

      Thanks HRZ for your comments, I have this problem solved through contacted the Intel support department.

      below is the solution:

      Please download *base.qar* file from the link: http://mail.terasic.com.cn/~wyzhou/base.qar , then replace the *base.qar* file in the DE5ANET_DDR4_OpenCL_BSP_17.1\de5a_net_ddr4\hardware\de5a_net_ddr4 folder with this new one and test your project again

      This solved my issue and the compilation process is done successfully.

      Thanks again for offering help.

      • HRZ's avatar
        HRZ
        Icon for Frequent Contributor rankFrequent Contributor
        6 years ago

        So, Terasic's BSP is broken, but instead of updating the BSP on their website, they expect people to waste days trying to figure out what is wrong until they contact their support and get the fix from the support? Or maybe they just realized the BSP they released one year ago is broken?