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LennartVH's avatar
LennartVH
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4 years ago

CRAM SEU detection and mitigation support with OpenCL/oneAPI

Hi there, I'm doing a large and long-running FPGA supercomputing project, with an average of 20 FPGAs running in parallel over the course of 5 months. Our project is very sensitive to cosmic ...
BoonBengT_Altera's avatar
BoonBengT_Altera
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4 years ago

Hi @LennartVH,

With some conversation going on with internal team, we understand that it is not possible to monitor internal hardware circuitry inside the FPGA with OpenCL code.

However as mention to monitor CRAM error then you can monito the CRC_ERROR pin on hardware. (more details can be found in the link below)

https://www.intel.com/content/www/us/en/docs/programmable/683869/current/cram-error-detection-settings-reference.html

Note: As a reference to the openCL code on managing memory, here are also some useful information.

Best Wishes

BB