Forum Discussion
Occasional ContributorConfusion regarding Stratix 10 OpenCL compilation report
Yes, the numbers in "acl_quartus_report.txt" is the entire chip usage. I just did a comparison between the HTML report on Arria 10 and Stratix 10 and I think I now see what you mean. On Arria 10 reports, after place and routing, a new section is added to the summary tab of the report named " Quartus Fit Resource Utilization Summary" which has the post-place-and-route resource usage of the kernel alone. However, this does not exist in the report for Stratix 10.
Looking through the compilation files, it seems these numbers are extracted from the biggest "*.fit.rpt". There is a table called "Fitter Resource Utilization by Entity" in the file and the entity called "freeze_wrapper_inst" seems to refer to the whole dynamic partition that includes the OpenCL kernel instance and its interfaces to the BSP. The same table also exists in the compilation folder for Stratix 10, it is just that it is located in "build/output_files/". I believe the same entity in that report also refers to the dynamic partition of the design and its area usage should represent the post-place-and-route area usage of the kernel, which is what you are looking for.
Frequent ContributorThe correct place to look for post-place-and-route area usage and frequency, regardless of target device, is the "acl_quartus_report.txt" file. Any number that you see in the HTML report is an "estimation" (as also mentioned in the report itself). Moreover, it seems you are looking at the area usage of the kernel alone. The final area usage will be the area usage of the kernel plus the area usage of the OpenCL BSP, which, in the case of Stratix 10, is quite large.
JSchr20Thanks for your response!
I had been given to believe that the report.html file was only an estimate *if* a full compile hadn't been run, but that after a full compile, the report reflected real numbers. I'm surprised that's not true; that's very useful to know, thank you.
Thanks also about the caution regarding kernel size vs. full-design size. I am aware of the distinction. I am specifically paying attention to kernel size in my spreadsheets because my kernel is small relative to the BSP, and I'm trying to estimate how many copies of it I can fit in the full design.
- JSchr20
One further question: do the numbers in the "acl_quartus_report.txt" file represent the entire chip resource usage (BSP + kernel)? That's my suspicion given the numbers, but I want to confirm that.
If I want kernel numbers only, do you have any idea which of the many build reports contains the final info on that? I can obviously subtract, assuming the resource estimate for the BSP in report.html is accurate enough, but this information must exist somewhere. I will go spelunking...
Thank you!
- HRZ
Yes, the numbers in "acl_quartus_report.txt" is the entire chip usage. I just did a comparison between the HTML report on Arria 10 and Stratix 10 and I think I now see what you mean. On Arria 10 reports, after place and routing, a new section is added to the summary tab of the report named " Quartus Fit Resource Utilization Summary" which has the post-place-and-route resource usage of the kernel alone. However, this does not exist in the report for Stratix 10.
Looking through the compilation files, it seems these numbers are extracted from the biggest "*.fit.rpt". There is a table called "Fitter Resource Utilization by Entity" in the file and the entity called "freeze_wrapper_inst" seems to refer to the whole dynamic partition that includes the OpenCL kernel instance and its interfaces to the BSP. The same table also exists in the compilation folder for Stratix 10, it is just that it is located in "build/output_files/". I believe the same entity in that report also refers to the dynamic partition of the design and its area usage should represent the post-place-and-route area usage of the kernel, which is what you are looking for.
- JSchr20
Thank you! That utilization report is, of course, the one that comes straight from Quartus, so I'm familiar with reading it, and you've been very helpful pointing me to the right "copy" of it, and to the correct layer of the hierarchy. It's impressively confusing inside those build directories. A note to Intel: I would like to be able to see this final information in the report.html, and also to be able to extract it easily from the underlying forms there, as I could with Arria 10.
