Forum Discussion

RYang28's avatar
RYang28
Icon for New Contributor rankNew Contributor
7 years ago

Compilation warning in GZip example in Intel FPGA SDK for OpenCL

Hi, ​ Recently, I'm trying the Intel FPGA SDK for OpenCL on Arria 10 boards. When I compile the GZip example with default flags stated in the readme.html. I got the warning msg below: Compiling f...
MuhammadAr_U_Intel's avatar
MuhammadAr_U_Intel
Icon for Contributor rankContributor
6 years ago
Is there any other timing violation in the report ? Did you tried re-compiling the design with same settings to see if the timing violations are there ? Also what version of OpenCL SDK are you using ?
  • RYang28's avatar
    RYang28
    Icon for New Contributor rankNew Contributor
    6 years ago
    Hi MUsman, 1. No other timing violations 2. Tried tens of times, the timing violation is always shown with no -seed option. 3. 18.1.1.263 Thanks for the help.