Bidirectional OpenCL Channel Stalls (both at read and write insts)

It is actually not very surprising to see stalls on both sides of a channel. Stalls, especially if they come from external memory, tends to propagate all the way through the pipeline. It is very much possible that the stalls on the channel write are coming from the external memory reads supplying those channel writes, and stalls on channel reads come from the channel being empty due to channel writes being stalled. i.e. external memory read stalls are propagating all the way down the pipeline. However, I do not see any external memory accesses in your design, nor do I see any access to external memory ports being instantiated by the compiler when compiling your kernel either and hence, I am not sure what it is exactly doing. What is the point of the pointer arithmetic on lines 38 and 60?