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txiao9's avatar
txiao9
Icon for New Contributor rankNew Contributor
6 years ago

Arria 10 GX Transceiver Native PHY using 64B/66B encoding/deconding in Basic(Enhanced PCS) Transceiver configuration rules.

As far as i know, when using Basic(Enhanced PCS) Transceiver configuration rules, user has to do the 64B/66B encoding/deconding which is not included in IP core himself . So is there any example w...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

HI,

Sorry, I understand what you meant now.

As NativePHY 64b/66b encoder/decoder is mainly designed to compliance with 10GBASE-R protocol only, That's why the feature can't be enabled in Basic (Enhance PCS) mode. User can only enable it when selecting "10GBASE-R" preset in NativePHY IP.

We don't have 64b/66b encoder/decoder example design out of NativePHY IP as this normally will goes into some specific protocol IP solution offered by Intel FPGA (For instance : Ethernet IP or JESD IP).

In short, we sell the feature as part of certain IP solution rather than share it as example design.

Thanks.

Regards,

dlim