Forum Discussion
Jai_Led__Tan
New Contributor
6 years agoaltera_fpga_manager ff706000.fpgamgr:timeout
Hello, I am currently working with an Altera DE1-SoC FPGA board on OpenCL with MSEL set to 01010. So, I was trying out a project from github with link https://github.com/Er1cZ/Deploying_CNN_on...
Vassiliev__Andrei
New Contributor
6 years agoHi Tan,
This message seems to indicate that the programming of the boot Flash for FPGA is failing at the address 0xff706000.
You can try to lower the frequency of the JTAG while it is programming Flash devive on DE10-Nano. I think command similar to the one mentioned in
should do it.
Trying another card is an option too.
If these fail try to reach out to Terasic Tech support.
Andrei.