New Contributor
Regular ContributorHi,
The Sequential IP can support multiple model as it is depend on how you implement the features into the IP. So the flow is to run "dla_compiler --network-file model.xml --march my_arch.arch" where it report what is the unsupported layer in the current Sequential IP.
Thanks.
New ContributorOkay so the dla compiler can be used to check that the OpenVino model can fit on the Sequential architecture description or it will report a mismatch.
Will the dla compiler generate any files that need to be manually dragged into the IP repo generated by the dla create ip command? (For example in the spatial IP, the weight mif files will be placed somewhere deep inside the IP repo folder, and then I have to drag them into somewhere the Quartus compiler can find them.) Or are these files loaded into the FPGA after programming, if yes how is this done and what are the relevant files?
