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BXia
Occasional Contributor
Occasional ContributorAgilex FPGA Quartus project simulation issue
To whom it may concern,
我们在仿真基于Agilex FPGA的工程时，发现mac的link比别的开发板（基于Stratix 10 FPGA）慢了很多，agilex的mac大概需要48wns才能link上，而Stratix 10 FPGA的mac大概只需要15wns就能link上。
我们分析的原因是，agilex生成的ip core（phy_10g_etile）里p...
paveetirrasrie_Altera
Frequent Contributor
Frequent ContributorHi Xia,
It is possible that different device might have different linking timing. It may due to various IP setting.
Please give me sometime to investigate this and will get back to you with updates.
Regards,
Pavee
