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Do you have a board in mind? Keep in mind that if you wish to use oneAPI FPGA Acceleration, you should choose an acceleration card with a supported BSP. We have a list of vendor cards on our homepage:
https://cdrdv2.intel.com/v1/dl/getContent/824530
Instead of building a full oneAPI BSP, you can also use the oneAPI DPC++/C++ compiler to create IP that you can integrate using a platform designer system. We demonstrate this in the Platform Designer code sample, and the Nios V reference design. You can learn more about IP interface customization by studying the HLS Flow Interfaces code samples as well.
Manually integrating your IP with Platform Designer (or SystemVerilog/VHDL if you are so inclined) gives you the ability to accelerate the embedded HPS, so you are not tied to an x86-64 host CPU.