Forum Discussion
New ContributorAccess for Stratix 10 node
Hi,
Have you try initialize the board?
You may refer to https://software.intel.com/content/www/us/en/develop/documentation/oneapi-programming-guide/top/programming-interface/fpga-flow/fpga-bsps-and-boards/fpga-board-initialization.html for more information.
Regular ContributorHi,
The API node that you connected should have the Stratix 10 PAC card connected. You should be able to performed "aocl diagnose".
May I know if you program the FPGA before you proceed with the host code?
New ContributorHi, I run "aocl diagnose" and it passed, seems like there's no problem with The FPGA card.
May I ask what you mean by "program the FPGA" ?
I ran the following commands, not sure if this is what you meant:
$ dpcpp -fintelfpga ../src/fuse.cpp -c -o dev.o
$ dpcpp -fintelfpga -fsycl-link=image dev.o -o device_image.a -Xshardware -Xsboard=intel_s10sx_pac:pac_s10
$ dpcpp -fintelfpga ../src/host.cpp -c -o host.o
$ dpcpp -fintelfpga host.o device_image.a -o FUSE.fpga
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I run the xxx.FPGA again, this time I got segmentation fault instead of (CL_INVALID_BINARY)
