Forum Discussion

jasonlin316's avatar
jasonlin316
Icon for New Contributor rankNew Contributor
4 years ago
Solved

Access for Stratix 10 node

Currently I have an account to DevCloud, and I used oneAPI to implement my work with Stratix 10 board chosen. However, it seems like I have to access Stratix 10 PAC node to run my work (instead of ...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


The API node that you connected should have the Stratix 10 PAC card connected. You should be able to performed "aocl diagnose".


May I know if you program the FPGA before you proceed with the host code?


  • jasonlin316's avatar
    jasonlin316
    Icon for New Contributor rankNew Contributor
    4 years ago

    Hi, I run "aocl diagnose" and it passed, seems like there's no problem with The FPGA card.

    May I ask what you mean by "program the FPGA" ?

    I ran the following commands, not sure if this is what you meant:

    $ dpcpp -fintelfpga ../src/fuse.cpp -c -o dev.o

    $ dpcpp -fintelfpga -fsycl-link=image dev.o -o device_image.a -Xshardware -Xsboard=intel_s10sx_pac:pac_s10

    $ dpcpp -fintelfpga ../src/host.cpp -c -o host.o

    $ dpcpp -fintelfpga host.o device_image.a -o FUSE.fpga

    -------------------------------------------------------------

    I run the xxx.FPGA again, this time I got segmentation fault instead of (CL_INVALID_BINARY)