Most Recenthow to simulate the altclkctrl IP ?Arria 10 PCIE lane reversalPCIE GEN 2 Speed grade in A10 FPGASCL_LOW, SCL_HIGH, SDA_HOLD register value of Intel FPGA Avalon I2C Master CoreHow to sync multiple jesd devices? is there any way (or requirements) to achive this using intel jesd ip?Triple Speed Ethernet : Low data rate with Simple Socket Server exempleProblem with IP core PlusWhy NCO IP outputs ZERO?We would like Intel help to provide reflow profile for FPGA: 5CGXFC4C7F27C8N.Arria 10 PCIE gen3 support gen2 or gen1
