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  • Altera_Forum's avatar

    Stratix IV GX transceivers: 32-bit word alignment in basic mode?

    Altera_Forum
    16 years ago
    3.4KViews
    0likes
    9Comments
  • Altera_Forum's avatar

    30-day evaluation license with Quartus Prime Lite 16.0 ??

    Altera_Forum
    10 years ago
    4KViews
    0likes
    5Comments
  • BQi's avatar

    Do we have the silimar ipcore with QDMA of Xilinx

    BQi
    6 years ago
    2.3KViews
    0likes
    1Comment
  • SYou1's avatar

    vref using max10

    SYou1
    6 years ago
    1.5KViews
    0likes
    1Comment
  • gsing54's avatar

    Hello, we are installing quartus19.4 pro linux version it showing the option of different different soc and fpga latest version but we want to add cyclone v se in pro version so how we can add the soc cyclone v se. please tell us as soon as possible..

    gsing54
    6 years ago
    872Views
    0likes
    4Comments
  • NIzm's avatar

    reconfig_clk0. The range of the frequency?

    NIzm
    6 years ago
    791Views
    0likes
    1Comment
  • AWu6's avatar

    do we have any coreARINC429 IP for some FPGA device?

    AWu6
    6 years ago
    805Views
    0likes
    1Comment
  • SMacw's avatar

    Generating Point Cloud from Realsense D435 though MATLAB Wrapper gives strange output.

    SMacw
    6 years ago
    1.2KViews
    0likes
    1Comment
  • CKulk2's avatar

    Intel RealSense: In the video capture mode, how many faces can it recognize at a time and detect emotions on and till what range?

    CKulk2
    6 years ago
    631Views
    0likes
    1Comment
  • ESaiv's avatar

    Hello! I am wondering if there is any way to utilize the 2.5 V LVDS differential IO using the DE1-SoC or DE10-Nano boards through the GPIO headers.

    ESaiv
    6 years ago
    1.2KViews
    0likes
    3Comments
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