Most RecentWe need to replace an ACEX 1K FPGA model EP1K100. The suggested replacement for ACEX 1K is the MAX V; however, the MAX V only has 2210 LEs which isn't enough (EP1K100 has 4992 LEs). The MAX 10 is a better match. Is this an appropriate choice?How can I connect the UART pins on the DE10 nano to the USB mini-B connector?Linux for Arria5 build problemIs it possible to allocate global memory in a memory device connected by PCIe using OpenCL?how to assing HPS_CLK1 as system clock?MAX10 Single Supply and Dual Supply DifferencesHi, We are using the 5CEFA9F23C8N in our project. We are using the HMC with DDR3. In the pinout file some gpio's in the HMC column are marked as GND. Do have to connect those gpio's to GND? Can we use them as general purpose?Both CPU0 and CPU1 found on 5CSEBA5U23I7S (which supposed to be a single core)Arria V GX with HSMC Debug Header PinsFunctionality test for FPGA
