Most RecentI am unable to get the bsp-editor to make the preloader for the embedded SOC in windows 10. The make file fails.Query on Cyclone III FPGA LVDS IO and VCCIOIs the automatic FPGA configuration with EPCQ-L configuration device possible?Timing violation when use Triple speed Ethernet IPLooking a PCIe shared library file tearaisc_pcie_qsys.so (DE5a-Net) for aarch64 processorCable to connect Arria10 SoC Development Kit to PC's PCIexpress?Unable to compile EP20K300EQC240-2X device using Quartus 9.0sp2 Web edition on Windows XP.Can I have the sources for System Max V on Arria 10 dev kit board (U16)?I'm not able to program the external flash device (which stores the FPGA configuration programming file) with the FPGA programming file (.jic file) using USB blaster II, JTAG and Quartus Prime standard edition 16.1.2 software.I have 2 DE0-Nano Development and Education Boards. The old board worked fine with the program, but the new board does not work with the same program. The EPCS chip of the new board is smaller than the old one, and I have an error using EPCS.
