Elegan
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Re: Timing Constraints to Active Serial Ports
Can you clarifiy which bugs in earlier versions are related to timing constraints on the Active Serial Ports? Unfortunately I still don't know how to exactly address them. As there are already even Intel IP components which are addressing these ports, like the "ASMI Parallel II Intel FPGA IP", I think it has to be possible, even in earlier versions. Or how do they handle that? Regards, Christian1.6KViews0likes0CommentsRe: Timing Constraints to Active Serial Ports
Hi Richard, yes, I assume that it must be somehow possible to put timing constraints on the Active Serial Ports. The problem is, I don't know how to address them. I am using the altera_asmi2_qspi_interface_asmiblock to connect to a qspi-flash located at the Active Serial Ports. (Somehow a custom ASMI Paralell FPGA IP) Unfortunately I can't find the atom_ports in Timequest. Also no results when searching for *dclk a.s.o. The only dedicated Pins I could find were the jtag-pins (altera_reserved_tck ...). I also searched for an .sdc of the "ASMI Parallel II Intel FPGA IP", which uses the same block to connect to the Active Serial Ports, but without success. Best Regards, Christian1.7KViews0likes0CommentsRe: Uniphy Platform Designer Error: "Cannot find sequencer/sequencer.elf"
Hello, in my case the proplem was related to a space in the "Windows User Account Name". Please see details under: https://community.intel.com/t5/Intel-Quartus-Prime-Software/DDR3-SDRAM-Controler-Compilation/m-p/1305130#M70355 Maybe this helps. Best Regards, Christian9KViews0likes0CommentsTiming Constraints to Active Serial Ports
Is there a possibility to put Timing Constraints (set_input_delay, set_output_delay) to the Active Serial Ports? (AS_Data, ...) Found a similar question in following post, but no solution. https://community.intel.com/t5/Intel-Quartus-Prime-Software/ALTASMI-PARALLEL-Timequest-Constraints/td-p/169456 Best Regards, Christian1.8KViews0likes6CommentsRe: DDR3 SDRAM Controler Compilation
Hello Adzim, I think I finally found the reason, why it worked on the other pc and not on mine. One difference was, that the windows user account on the other pc was a local one, called Admin. So I additionally added to my domain account on my working pc, a local one called "ChrisLokal", After that, it also worked on this pc. To verify my assumption I additionally created a local account called "Christian Lokal", resulting in the known issue during compilation of the DDR3 controller. So, my assumption is, that the problem is related to the space in the user account name between "Christian" and "Lokal". (There is also a space in my company domain account.) Hopefully this information helps to reproduce the problem and pinpoint you to the cause of the issue. Regards, Christian4.4KViews1like0CommentsRe: DDR3 SDRAM Controler Compilation
Hi Adzim, technically the computers are not the same. Mine is much older and of course has different hardware. But I don't see how this could impact the compilation process of the DDR3 controller. And if you don't see anything in the error log, I truly understand, that you are running out of ideas. I just wanted to evaluate the improvements made to qspi flash support, as I think that it is not ideally implemented in Quartus 18.0, the version I am working with at the moment. Nevertheless, thank you very much for your support. Stay safe, Christian4.5KViews0likes0CommentsRe: DDR3 SDRAM Controler Compilation
Hi Adzim, the windows build version is 19043.1165. I tried the workaround although it doesn't make much sense to me. As expected, it reported, that Windows Subsystem for Linux is needed. I assume this workaround is for Quartus versions <19.1 where cygwin is used instead of WSL. Please find the error log after the reinstallation of windows attached. Regards, Christian4.5KViews0likes0CommentsRe: DDR3 SDRAM Controler Compilation
Hi Adzim, yesterday I completely reinstalled Windows on my computer (it was time anyway), but even after that the IP doesn't compile on my computer. So I removed wsl, Ubuntu and quartus on both computers, made sure that both have the same Windows build installed and simultanously did a step by step installation of wsl ubuntu and quartus. Result: Works on the other pc, but not on mine. As a last try I installed Quartus Pro19.2. on my computer (as it is installed on the other pc from an evaluation in the past), but without success. I really don't know, what now differs the two computers, letting pass the compilation on one and not on the other. Best Regards, Christian4.6KViews0likes0CommentsRe: DDR3 SDRAM Controler Compilation
Hi Adzim, after reinstallation of the components in your suggested order, I am still not able to compile the DDR3 IP. I also tried to uninstall everything (including Quartus) and install it in the order of WSL, Ubuntu, Quartus but still without success. After that I did the same on another pc. On this computer the IP compilation was successful. I really don't know whats the big difference between my working pc and the one, where compilation was successful. (Windows-Versions are almost the same) Maybe I have to completely reinstall Windows to be successful on my working pc. Best Regards, Christian4.6KViews0likes0Comments