Ahmed_H_Intel1Frequent ContributorJoined 7 years ago585 Posts38 LikesLikes received29 SolutionsView All Badges
ContributionsMost RecentMost LikesSolutionsRe: NIOS debug does not recognize the connection Great, let me know if you still facing this issue. Re: compiling quartus project using Git runner Thanks a lot for your sharings. Re: Nios II projects in Eclipse fail to compile Hi, You must install the Windows Subsystem for Linux WSL. Please follow the following link to know how to do so: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/tools/2019/how-do-i-install-the-windows--subsystem-for-linux---wsl--on-wind.html Best regards, Re: Can I implement MAX10 system upgrade without NIOSII using an external uC? Hi, The system upgrade requires a communication protocol, without NIOS II will be very hard but not impossible. Best regards, Re: compiling quartus project using Git runner Hi, Can you share with me the root cause you found? Re: Hi, so im trying to learn the Nios 2 Assembly Language for my internship project. I found some intels laboratory exercises on the internet, but i dont know the solutions. so i was wondering if there is some way i can find those solutions. Hi, Please check the design store here: https://fpgacloud.intel.com/devstore/platform/?acds_version=any This will help you to download pre-designed examples and you can start from there. Best regards, Re: How do I get to first base building legacy code for NIOSII processor? Can I do build on unrelated linux PC? Hi, As you say it is legacy design. I advise you to follow the normal procedure of downloading a cross compiler ex: from Linaro, the Linux you want to compile and compile all the required files (U-boot, RFS, Linux, and DTS). The Quartus will help you to get the system .sof file to configure the FPGA. Best regards, Re: NIOS debug does not recognize the connection Hi, Have you checked the JTAG frequency? please use the following command to edit the frequency: jtagconfig --setparam <cable number> JtagClock <frequency>. <cable number> best regards, Re: MAX10 Remote System Upgrade (RSU) over UART for Nios II Processor Hi, Yes, you can, but you must adjust the device address and make sure that all settings are compatible with the new device. You can simply re-create the design for the required device and include the .c files you need to the project (after editing it). Best regards, Re: master - slave multi-core nios systems Hi, Please download the design example from here and start from there. The example shows you how the master core copies the hex files for each core and reset it. https://fpgacloud.intel.com/devstore/platform/17.0.0/Standard/multi-core-nios-ii-processors-reference-design-based-on-arria-10-soc-development-board/ Best regards,