BBS3000
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Re: Intermittent alt_exception_unknown
Hi Archer, Thank you for such detailed response. I found the latest version of the fifoed_avalon_uart (13.2) and will try it at some point. Meanwhile I have a few comments. I registered custom alt_instruction_exception_handler that has 3 parameters: cause, exception_pc and badaadr. It does not have exception_context parameter that you have mentioned. My BSP does not have IORD_ALTERA_AVALON_UART_STATUS, ALTERA_AVALON_UART_STATUS_xxx_MSK definition. I guess they are for the standard UART. I can use their FIFOED_AVALON_UART_STATUS_xxx counterparts but some of them the driver uses for calling a corresponding ISR, so it seems that Overrun error is not considered as a problem. e.g. static void fifoed_avalon_uart_irq(void* context, alt_u32 id) { ... /*Read the status register in order to determine the cause of the interrupt. */ status = IORD_FIFOED_AVALON_UART_STATUS(base); /* Clear any error flags set at the device */ IOWR_FIFOED_AVALON_UART_STATUS(base, 0); /* process a read irq */ if (status & (FIFOED_AVALON_UART_STATUS_RRDY_MSK | FIFOED_AVALON_UART_STATUS_RX_TH_MSK | FIFOED_AVALON_UART_STATUS_ROE_MSK | FIFOED_AVALON_UART_STATUS_TMT_MSK)) { fifoed_avalon_uart_rxirq (sp, status); } ... } Thanks!Intermittent alt_exception_unknown
Hello, I experience an intermittent alt_exception_unknown problem during data load on one of the fifoed_avalon_uart (IP version 9.3.0). The system instantiates a total of 7 fifoed_avalon_uart ports. The exception is generated from different places of the application. I registered custom instruction-generated exception handler and observed multiple executions of it with cause 2 (NIOS2_EXCEPTION_INTERRUPT). Is there any way to get more information about the problem during debugging? What can cause such problem? How can it be resolved? The NIOS II documentation does not provide a lot of information on this subject. The comments in the alt_exception_unknown in alt_exception_entry.S talk about mismatch of the compiled SW and the actual NIOS II core (we compiled and are running on NIOS II/f so it is not the case) MMU/MPU exception (we don’t have them enabled) Trap instruction (does not look like our case) Illegal instruction (does not look like our case) HW spurious interrupts (we are using internal interrupt controller, how can we check for this problem?) Thanks you!Re: Failed to boot NIOS II app from S25FL128SAGNFM001 using Intel GSFI
Hi, Thank you for your reply. The OnChip memory is too small to copy there the application. The async_512Kx32 is an external RAM that is used for running the application. It works since the debugger loads the app there without any problems. Thanks.Failed to boot NIOS II app from S25FL128SAGNFM001 using Intel GSFI
Hello, I am having troubles with booting up a Cyclone V NIOS II app from S25FL128SAGNFM001 using Intel GSFI. I am using 22.1 tools. I tried to follow the https://community.intel.com/cipcp26785/attachments/cipcp26785/fpga-wiki/926/1/Generic_Serial_Flash_Interface_design_example_quick_start_guide_final_updated.pdf but have no luck. Sorry for a very long post. Here is the Platform Designer NIOS setup Here is the Intel GSFI /Flash setup The NIOS application runs from the RAM and accesses the flash with no problems (for some reason my app reports Control Register = 0x82 instead of 0x101) but I cannot boot it from the flash. Here are the BSP settings Here is the mem_init_generate output (only serial_flash_top_0.hex is used) 17:02:22 **** Build of configuration Nios II for project app **** wsl make mem_init_generate Info: Building /mnt/c/Work/Projects/app/Cyclone_V/app_bsp/ make --no-print-directory -C /mnt/c/Work/Projects/app/Cyclone_V/app_bsp/ [BSP build complete] Post-processing to create mem_init/boot_rom.hex... elf2hex.exe app.elf 0x00018000 0x0001afff --width=32 --little-endian-mem --create-lanes=0 mem_init/boot_rom.hex Post-processing to create mem_init/cycloneIII_3c25_ept_with_niosII_sopc_onchip_memory2_0.hex... elf2hex.exe app.elf 0x00010000 0x00014fff --width=32 --little-endian-mem --create-lanes=0 mem_init/cycloneIII_3c25_ept_with_niosII_sopc_onchip_memory2_0.hex Post-processing to create mem_init/serial_flash_top_0.hex... alt-file-convert.exe -I elf32-littlenios2 -O hex --input=app.elf --output=mem_init/serial_flash_top_0.hex --base=0x03000000 --end=0x03ffffff --reset=0x03800000 --out-data-width=8 --boot="C:\intelfpga_lite\22.1std\nios2eds\components\altera_nios2\boot_loader_cfi.srec" Converting Nios II ELF file to HEX file. Appending boot file. Post-processing to create mem_init/hdl_sim/async_512Kx32.dat... elf2dat --infile=app.elf --outfile=mem_init/hdl_sim/async_512Kx32.dat \ --base=0x00400000 --end=0x005fffff --width=32 \ --little-endian-mem --create-lanes=0 Post-processing to create mem_init/hdl_sim/boot_rom.dat... elf2dat --infile=app.elf --outfile=mem_init/hdl_sim/boot_rom.dat \ --base=0x00018000 --end=0x0001afff --width=32 \ --little-endian-mem --create-lanes=0 Post-processing to create mem_init/hdl_sim/cycloneIII_3c25_ept_with_niosII_sopc_onchip_memory2_0.dat... elf2dat --infile=app.elf --outfile=mem_init/hdl_sim/cycloneIII_3c25_ept_with_niosII_sopc_onchip_memory2_0.dat \ --base=0x00010000 --end=0x00014fff --width=32 \ --little-endian-mem --create-lanes=0 Post-processing to create mem_init/hdl_sim/ssram_0.dat... elf2dat --infile=app.elf --outfile=mem_init/hdl_sim/ssram_0.dat \ --base=0x00600000 --end=0x006fffff --width=32 \ --little-endian-mem --create-lanes=1 Post-processing to create mem_init/hdl_sim/async_512Kx32.sym... nios2-elf-nm.exe -n app.elf > mem_init/hdl_sim/async_512Kx32.sym Post-processing to create mem_init/hdl_sim/boot_rom.sym... nios2-elf-nm.exe -n app.elf > mem_init/hdl_sim/boot_rom.sym Post-processing to create mem_init/hdl_sim/cycloneIII_3c25_ept_with_niosII_sopc_onchip_memory2_0.sym... nios2-elf-nm.exe -n app.elf > mem_init/hdl_sim/cycloneIII_3c25_ept_with_niosII_sopc_onchip_memory2_0.sym Post-processing to create mem_init/hdl_sim/ssram_0.sym... nios2-elf-nm.exe -n app.elf > mem_init/hdl_sim/ssram_0.sym I combine FPGA sof file and NIOS hex file into common jic file. Any help will be greatly appreciated. Thanks!
