prateekmohan
New ContributorJoined 4 years ago
User Profile
New Contributor
User Widgets
Contributions
NIOS2 address mapping
Hello, I am trying to understand the address mapping for the data master in the NiosII processor. Currently, I have a system that looks like this: The nios2 data master is connected to two slaves - a "data_ram" which I want to be used for all data related transactions, the debug interface "debug_mem_slave", and "reg_intf_sys_0" which is a peripheral register I want to access from the NIOSII. Now the strange part is that the address mapping seems to indicate only addresses from 0x0 -> 0x1f_ffff are supposed to go to the "reg_intf_sys_0" but when I ran a simulation I see this: I can see the d_address (the data master address) performing a read at address 0x203de0, but it seems to be accessing the reg_intf_sys_0. I'm just a bit confused about why it's accessing this address space. I don't have any code on the NIOS2 that accesses this region, I have attached the "hello.c" file that I am running on the NIOS2. The address mapping seems strange, so I wanted to ask about it.Re: PCIe Avalon-MM to DDR Write and Read
Hi Deshi, How can I go about replacing it with DDR3 or DDR4? I believe the only way is to use the IP Block "External Memory Interface IP" right? The problem with this IP is that it provides its own clock reference to the master that is writing/reading to it. However, the PCIe Avalon Master is running off the PCIe clock (250 MHz). So how would I replace the BRAM with a DDR3 or DDR4?NiosII HelloWorld Error
Hello, I am trying to simulate a simple NiosII design (the HelloWorld application) in order to understand how the NiosII works but I cannot see the print statement "Hello from Nios II!" show up on my ModelSim Transcript. I attached my ModelSim transcript to this post in case the warnings mean something that I'm missing. I am following the instructions in section 6.5 from this page: Embedded Design Handbook (intel.com) My QSYS project looks like below - if you want me to attach a QAR of my project I can do that as well. Regards, PrateekSimulating Designs - NiosII on other simulators
Hello, I was looking at this guide : Intel Quartus Prime Pro Edition User Guide: Third-party Simulation in order to see how I can simulate designs outside of ModelSim and I see on Section 1.5.3 the description of how to simulate NiosII modules. Is it possible to simulate this on other simulators as well? Or can it only be simulated on ModelSim? I was looking from this guide Embedded Design Handbook (intel.com) section 6.5 to learn how to simulate NiosII designs, but it only mentions to use ModelSim. Regards, PrateekRe: PCIe Avalon-MM to DDR Write and Read
Hi Deshi, I looked at the guides and it refers to using an "Avalon-MM DMA" type interface for the PCIe when communicating from PCIe to DDR. I'm looking for something that is only an "Avalon-MM" interface. Is there a reference design that perhaps deals with only "Avalon-MM" interfaces? I am also trying to download the "Arria 10 Reference Design" link on page 3 from this PDF: PCI Express DMA Reference Design Using External Memory (intel.com) However, I get a "File Not Found" errorPCIe Avalon-MM to DDR Write and Read
Hello, I am looking at methods to write/read from DDR from my host system through the PCIe Hard IP block. I have looked at some examples for Qsys projects using the PCIe Hard IP block and I understand how the rxm_bar<n> Avalon interfaces are used to access memory mapped regions through PCIe: I also saw an example of the "External Memory Interface IP" to see how to communicate to DDR and I see the Avalon Slave on the EMIF is used to read/write to DDR: However, I cannot connect the rxm_bar<n> interface directly to this because the EMIF provides its own clock for the transactions to the EMIF. I guess I can add a dual port Avalon-MM in between both of these (so the PCIe Hard Macro writes to the Avalon-MM memory and perhaps a DMA reads data from this BRAM and pushes it to the EMIF) but I was not sure if there was a more elegant way of doing this. I think others must have done something similar to this, so I wanted to ask if there was another way. Thanks! Prateek
