ContributionsMost RecentMost LikesSolutionscannot launch modelsim simulator Hi, I have a small problem while launching the Modelsim- simulation software.I have installed the Altera Web-edition software and also the Modelsim-Altera software tool . While i launch the simulation tool I found an error displaying "Cannot launch the Modelsim-Altera software --the path to the loaction of the executables for the Modelsim-Altera were not specified or not found at the specified path. I think i have installed all the files related to the software simulation tool . could anyone help me out to solve this problem. jtag clock default configuration Hi, I had a small problem with the Jtag Clock . I have change the jtag clock to 6M by the command 😞 jtagconfig --setparam 1 JtagClock =6M).The clock has got configured.But the problem is if i discard the jtag usb from the pc . I have to configure the clock again and again. Do i have any alternate method so that i need not to configure the clock again . once after i configured even though i discard the jtag usb from the pc. Can any one help me out to solve this problem... Re: Re: jtag clock default configuration Hello sir, I am waiting for the reply . I hope the reply comes as soon as possible. regard sowmyasista. Re: jtag clock default configuration Hello sir, The part number of the FPGA that is am using is from CYCLONE-3 family PARTNO:-EP3C80UFPGA484. Re: component could not be found Thank You sir for Your valuable information.I have solved the problem component could not be found Hi, I had a problem after i reopen qsys tool. I had 7 custom component(user created ip's in vhdl) which have exceeded the size of qsys (500mb). so i have increased the qsys size and creating my entire design in the newly opened qsys gui. Then i have generated the vhdl wrapper file and instantiated in my project (vhdl top file). As I had to do few modifications in my design . I have reopened by qsys gui I got the errors as follows component<component_name>1.0 not found (or) could not be instantiated I got this error for all the custom(user created vhdl ip's). How could i solve this problem Can any one help me out to solve these errors.