max® 10 fpgas
252 TopicsWhy do I get "Fatal Error: Access Violation at" when running quartus_syn or quartus_fit?
Description Due to a problem in the Quartus® Prime Pro Edition Software versions 26.1 and earlier, and Quartus Prime Standard Edition Software versions 25.1 and earlier, compilation may terminate with a "Fatal Error: Access Violation" message during synthesis or fitting. This failure can occur intermittently, and the reported memory address may change between compilation runs. You may observe one or more of the following behaviors: Quartus® compilation fails during synthesis or fitting The failure may occur in either of the following modules: quartus_syn (during synthesis) quartus_fit (during fitting) The error message is similar to: *** Fatal Error: Access Violation at <<ADDRESS>> The reported memory address may change between runs. The fatal error is followed by a stack trace that includes one of the failure signatures listed below. CDB_SGATE_OTERM::adopt_fanouts HDB_ASGN_CONTAINER::remove_assignment LUTIL_DEVICE::get_fragment_from_subloc STA_NODE::reset_tag_heads DESIGN_HDB_ASSIGNMENT_CONVERTER::cleanup_after_conversion BSYN_RTM_FLOP::IsExpired RTM_ATOM_MGR::rip_out_simple_ff_for_bypass IRTM_FF_QUEUE::remove_ff PTI_BCM_TIMING_GRAPH::push_back_carry_hipi_clock_iterm FTM_TREE_NODE::num_sgates Stack traces may differ, even when compiling the same design. Specific Failure Signatures: Synthesis failure (quartus_syn): The crash report includes the following function call: RTL_ADDER::aggressive_adder_balancing Fitter failure (quartus_fit): The error occurs very early after the fitter starts, and the crash report includes the following function call: qhd_reread_global_assign_from_qsf Error Log Examples Stack Trace example for crashes in quartus_syn *** Fatal Error: Access Violation at 00007FFB92E2C63E Module: quartus_syn.exe Stack Trace: Quartus 0xc63d: CDB_SGATE_OTERM::adopt_fanouts + 0x2d (db_cdb_sgate) Quartus 0x117e7: RTL_ADDER::shrink_iports + 0x1f7 (SYNTH_OPT) Quartus 0x14a75: RTL_ADDER::create_binary_adder + 0x49e9 (SYNTH_OPT) Quartus 0x45910: RTL_ADDER::restrict_adder_network + 0x84a (SYNTH_OPT) Quartus 0x4f5d6: RTL_ADDER::aggressive_adder_balancing + 0x9d (SYNTH_OPT) Quartus 0x11533: RTL_SCRIPT::call_common_rtl_fns + 0x1043 (SYNTH_OPT) Quartus 0x115b5: RTL_SCRIPT::call_named_function + 0x8a2 (SYNTH_OPT) Quartus 0x3a87a: RTL_SCRIPT::process_script + 0x62c (SYNTH_OPT) Quartus 0x3a8e4: run_parallel_rtl + 0x1db4 (SYNTH_OPT) Quartus 0x8509d: SYNTH_QIS::SYNTHESIS_FLOW::run_parallel_rtl_in_helper_processes + 0x285 (synth_qis) Quartus 0x850d5: SYNTH_QIS::SYNTHESIS_FLOW::high_level_synthesis + 0x47d (synth_qis) Quartus 0x8546d: SYNTH_QIS::SYNTHESIS_FLOW::run_current_phase + 0x286 (synth_qis) Quartus 0x854d4: SYNTH_QIS::SYNTHESIS_FLOW::run_full_flow + 0x30d (synth_qis) Quartus 0x859b7: QIS_RTL_STAGE_IMPL::synthesize + 0x467 (synth_qis) Quartus 0x15b55: qis_synthesize + 0x245 (synth_qis) Quartus 0x16442: TclNRRunCallbacks + 0x62 (tcl86) Quartus 0x16f4d: TclEvalEx + 0x9ed (tcl86) Quartus 0xa6ab8: Tcl_FSEvalFileEx + 0x22b (tcl86) Quartus 0xa5136: Tcl_EvalFile + 0x36 (tcl86) Quartus 0x15246: qexe_evaluate_tcl_script + 0x4e6 (comp_qexe) Quartus 0x1143b: qexe_do_tcl + 0x46b (comp_qexe) Quartus 0x1a70e: qexe_run_tcl_option + 0x5ee (comp_qexe) Quartus 0x16451: QCU::DETAIL::initialize_qhd_and_run_qexe + 0xa1 (comp_qcu) Quartus 0x1f8e2: qcu_run_tcl_option + 0x2f2 (comp_qcu) Quartus 0x1b1ba: qexe_standard main + 0x26a (comp_qexe) Quartus 0x29eb: qexe_run + 0x3eb (comp_qexe) Quartus 0x1192p: qsyn2_main + 0x1a9p (quartus_syn) Quartus 0x1e808: msg_main_thread + 0x18 (CCL_MSG) Quartus 0x17021: msg_thread_wrapper + 0x71 (CCL_MSG) Quartus 0x1c89d: mem_thread_wrapper + 0x70 (CCL_MEM) Quartus 0x1b49d: msg_exe_main + 0x20d (CCL_MSG) Quartus 0x2b6c: __scrt_common_main_seh + 0x11c (quartus_syn) Quartus 0x2e8d6: BaseThreadInitThunk + 0x16 (KERNEL32) Quartus 0x5b3b: RtlUserThreadStart + 0x2b (ntdll) End-trace Stack Trace example for crashes in quartus_fit *** Fatal Error: Access Violation at 00007FFB8F79CFF7 Module: quartus_fit.exe Stack Trace: Quartus 0x1cff6: HDB_ASGN_CONTAINER::remove_assignment + 0x52 (DB_HDB) Quartus 0x1cf71: HDB_ASGN_CONTAINER::destroy_assignment + 0x31 (DB_HDB) Quartus 0xca69c: anonymous namespace::delete_all_global_assignments + 0x25c (comp_qhd) Quartus 0xcc344: qhd_reread_global_assign_from_qsf + 0x384 (comp_qhd) Quartus 0x51679: QHD_DATABASE_UTILS::load_design + 0x449 (comp_qhd) Quartus 0x1e1e0: FIT2_DATABASE_EXPERT_QDB::load + 0x5b0 (comp_fit2) Quartus 0x3xee: fit2_create_fitter_netlist + 0x3xee (comp_fit2) Quartus 0x16442: TclNRRunCallbacks + 0x62 (tcl86) Quartus 0x16f4d: TclEvalEx + 0x9ed (tcl86) Quartus 0xa6ab8: Tcl_FSEvalFileEx + 0x22b (tcl86) Quartus 0xa5136: Tcl_EvalFile + 0x36 (tcl86) Quartus 0x15246: qexe_evaluate_tcl_script + 0x4e6 (comp_qexe) Quartus 0x1143b: qexe_do_tcl + 0x46b (comp_qexe) Quartus 0x1a70e: qexe_run_tcl_option + 0x5ee (comp_qexe) Quartus 0x16451: QCU::DETAIL::initialize_qhd_and_run_qexe + 0xa1 (comp_qcu) Quartus 0x1f8e2: qcu_run_tcl_option + 0x2f2 (comp_qcu) Quartus 0x29eb: qexe_run + 0x3eb (comp_qexe) Quartus 0x16f2d: qfit2_main + 0x82d (quartus_fit) Quartus 0x1e808: msg_main_thread + 0x18 (CCL_MSG) Quartus 0x17021: msg_thread_wrapper + 0x71 (CCL_MSG) Quartus 0x1c89d: mem_thread_wrapper + 0x70 (CCL_MEM) Quartus 0x1b49d: msg_exe_main + 0x20d (CCL_MSG) Quartus 0x2b6c: __scrt_common_main_seh + 0x11c (quartus_fit) Quartus 0x2e8d6: BaseThreadInitThunk + 0x16 (KERNEL32) Quartus 0x5b3b: RtlUserThreadStart + 0x2b (ntdll) End-trace Resolution This problem is currently scheduled to be resolved in a future release of the Quartus Prime Pro Edition Software and the Quartus Prime Standard Edition Software. If you are using Quartus Prime Pro Edition Software version 26.1, apply the attached patch for your operating system: Download the Linux or Windows patch package for your platform. On Linux, install the patch package from the console. On Windows, run the patch executable file. Confirm the installation by opening the Quartus Prime GUI and checking the About window, or by running: quartus_sh -v If applying the patch is not possible, or if you need assistance with other Quartus Prime software versions, contact your local Altera support representative. Additional Information Affected software: Quartus Prime Pro Edition Software version 26.1 and earlier Quartus Prime Standard Edition Software version 25.1 and earlier7Views0likes0CommentsWhat is the GPIO pin state after full power-up and before configuration mode for MAX® 10 FPGA devices?
Description For MAX® 10 FPGA devices, GPIO pins are typically tri-stated with weak pull-up enabled after full power-up and before configuration mode, except for the pin identified in the table below for each device package. That pin is tri-stated without weak pull-up enabled during this period, but it functions correctly in user mode. Device Package Type Y180 180-pin WLCSP M153 153-pin MBGA U169 169-pin UBGA U324 324-pin UBGA B610 610-pin VPBGA E144 144-pin EQFP 10M02 — D7 E6 C5 — 128 10M04 — D7 E6 C5 — 132 10M08 — D7 E6 C5 — 132 10M16 A5 — E6 C5 — 132 10M25 — — — — — 132 10M40 — — — — P18 133 10M50 — — — — P18 133 Device Package Type U324 324-pin UBGA F256 256-pin FBGA B610 610-pin VPBGA F484 484-pin FBGA F672 672-pin FBGA 10M02 C5 — — — — 10M04 C5 B5 — — — 10M08 C5 B5 — E8 — 10M16 C5 B5 — E8 — 10M25 — B5 — E8 — 10M40 — B5 P18 E8 E10 10M50 — B5 P18 E8 E10 Resolution This is expected behavior. If your system depends on the GPIO pin state during this period, consider adding an external pull-up resistor to the pin or selecting a different GPIO pin in your design.37Views0likes0CommentsWhy USB-Blaster II does not work after closing the Quartus® Programmer Hardware Setup window?
Description When using Quartus® Prime Standard Edition to program a MAX® 10 FPGA device with a USB-Blaster II, changing the Hardware Setup frequency from the default 24 MHz to 16 MHz and then closing the Hardware Setup window with the Close button may cause the USB-Blaster II to stop functioning. Resolution Here are some practical solutions you can try to resolve the issue: 1. Restart the JTAG server. jtagserver --stop jtagserver --start 2. Unplug and replug the USB-Blaster II. 3. Kill lingering processes such as the JTAG server or Quartus Programmer process. jtagserver.exe quartus_pgm.exe 4. Change the clock frequency of the USB-Blaster II download cable to lower frequency like 16Mz and 6Mz. Related KDB: How do I change the clock frequency of the USB-Blaster II download cable? | Altera Community - 342304 5. Avoid USB conflicts by disconnecting other USB serial devices, especially FTDI or USB-UART adapters, and avoid opening COM ports or serial terminal applications while programming. 6. Try a different USB port and connect the USB-Blaster II directly to the PC instead of through a USB hub. 7. Reinstall the driver from the Quartus installation folder or try an older or known-stable driver version. 8. Avoid mixing drivers from multiple Quartus versions. 9. If a USB hub is required, avoid poor-quality or legacy USB 1.0 hubs. 10. If a clone USB-Blaster is being used, replace it with a known-good cable. 11. If none of the above steps recover the problem, reboot the system. Possible root causes: 1. JTAG server gets stuck and keeps the USB-Blaster II claimed. The device can appear normal in the operating system but remain inaccessible from Quartus Programmer. Restarting Quartus alone often does not recover the cable. Fix: jtagserver --stop jtagserver --start Or kill the process via Task Manager. 2. USB or driver conflicts with other devices. Conflicts with other devices, especially FTDI or USB-UART adapters, can break the USB-Blaster II mid-session. Opening a serial terminal can trigger the failure. This behavior is reported more often on Windows 64-bit systems. Fix: Disconnect other USB serial devices. Avoid opening COM ports or serial terminal applications while programming. Try a different USB port with a direct connection instead of a USB hub. 3. Driver bugs or Quartus version mismatches. Driver bugs or Quartus version mismatches can prevent Quartus Programmer from detecting the cable. Known bad driver versions or incompatible Quartus releases can cause the Programmer to lose the cable or prevent the standalone Programmer from detecting it. Fix: Reinstall the driver from the Quartus installation folder. Try an older or known-stable driver version. Avoid mixing drivers from multiple Quartus versions. 4. USB hub or signal quality problems. USB hub or signal quality problems can cause the USB-Blaster II to disappear after use. This is reported more often with poor-quality hubs or legacy USB 1.0 hubs. Fix: Plug the USB-Blaster II directly into the PC. Avoid poor-quality or legacy USB 1.0 hubs. 5. Clone USB-Blaster hardware. Clone USB-Blaster hardware can be unstable due to timing issues, firmware quirks, or driver incompatibilities. Fix: Replace the clone USB-Blaster with a known-good cable. 6. Closing Quartus Programmer leaves the cable in a bad state. Closing Quartus Programmer can leave the JTAG server running. It can leave the device handle locked. It can trigger USB re-enumeration issues on the USB stack. When Quartus Programmer is reopened, it may not be able to reattach to the already claimed cable. Fix: Unplug and replug the USB-Blaster II. Kill lingering JTAG server or Quartus Programmer processes. Reboot the system if the cable is still not detected.101Views0likes0CommentsWhy is the Avalon MM interface optimized away when using the SDI Audio Embed or SDI Audio Extract IP?
Description Due to a problem in the Quartus® Prime Pro Edition Software version 25.3 and earlier, the SDI Audio Embed IP and SDI Audio Extract IP might show incorrect behaviour when the generated IP name is audio_embed or audio_extract. In this condition, the affected output ports are left undriven and connected to the default value gnd, you will see messages similar to those shown below: Output port "reg_waitrequest" in instance "u0" of entity "audio_extract" does not have a driver. Connecting to the default value "gnd". Output port "reg_readdatavalid" in instance "u0" of entity "audio_extract" does not have a driver. Connecting to the default value "gnd". Output port "reg_readdata[0..7]" in instance "u0" of entity "audio_extract" does not have a driver. Connecting to the default value "gnd". Output port "reg_waitrequest" in instance "u1" of entity "audio_embed" does not have a driver. Connecting to the default value "gnd". Output port "reg_readdatavalid" in instance "u1" of entity "audio_embed" does not have a driver. Connecting to the default value "gnd". Output port "reg_readdata[0..7]" in instance "u1" of entity "audio_embed" does not have a driver. Connecting to the default value "gnd". Resolution To work around this problem, use a different IP name to avoid a naming that conflicts with the generated HDL module naming used by the Quartus® Prime Pro Software for the SDI Audio Embed or SDI Audio Extract IP. For example: Do not name the SDI Audio Embed IP as audio_embed. Do not name the SDI Audio Extract IP as audio_extract. Regenerate the IP after renaming it to a non-conflicting name. This problem is currently scheduled to be resolved in a future release of the Quartus ® Prime Pro Edition Software.51Views0likes0CommentsWhy do I get Error (169059) when compiling for MAX® 10 FPGA (Dual Supply) B610 package with 1.0 V I/O standard?
Description In Quartus® Prime Standard Edition 25.1 and earlier, compiling a design targeting MAX® 10 dual power supply devices of the B610 package fails when the design uses a 1.0 V I/O standard assignment. Observed error: Error (169059) The MAX® 10 FPGA General Purpose I/O User Guide indicates that the 1.0 V LVCMOS I/O standard is available only for specific device combinations, and the dual power supply devices of the B610 package are part of that. Resolution This problem is scheduled to be resolved in a future release of the Quartus® Prime Standard Edition Software.94Views0likes0CommentsWhy does Board Support Package Editor fail to generate embedded peripheral IP drivers when generating BSP FreeRTOS project for Nios® V processor?
Description Due to a problem in the Quartus ® Prime Standard Edition Software version 24.1 and 25.1, the BSP Editor fails to generate embedded peripheral IP drivers, when it is generating BSP FreeRTOS project for Nios ® V processor. This is because the BSP Editor is not enabled to generate those drivers in FreeRTOS. Refer to Embedded Peripherals IP User Guide - Driver Support for the list of embedded peripherals with driver support. Resolution Patches are available to fix this problem for the Quartus ® Prime Standard Edition Software version 24.1 and 25.1 Linux and Windows versions. Download and install patch below. Quartus® Prime Standard Edition Software v24.1 Patch 0.01 Quartus® Prime Standard Edition Software v25.1 Patch 0.01 This problem is currently scheduled to be resolved in a future release of the Quartus ® Prime Standard Edition Software.60Views0likes0CommentsWhat should I consider when designing a system board using Schmitt trigger inputs on MAX® 10 FPGAs?
Description When designing a system board that uses Schmitt trigger inputs on MAX® 10 FPGAs, board-level noise, power integrity, and signal integrity can significantly affect the effective hysteresis behavior. Factors such as power supply noise, input signal noise, and PCB layout practices may cause the observed switching thresholds to deviate from their typical values. This article outlines key considerations to help minimize noise sensitivity when using Schmitt trigger inputs in a system-level design Resolution When designing a system board that uses Schmitt trigger inputs, consider the following: Follow the recommendations in the MAX® 10 FPGA Design Guidelines, especially sections related to power distribution network (PDN) and signal integrity. Minimize power supply noise by using proper decoupling, grounding, and PCB layout practices. Note: The MAX® 10 FPGA 10M08 Evaluation Kit is intended for low-cost application testing and is not designed for DC or PDN characterization. It should not be used to measure intrinsic transistor switching thresholds.146Views0likes0CommentsWhy are some simulation library files missing when compiling for Questasim*?
Description Due to a problem in Simulation Library Compiler in the Quartus® Prime Standard Edition Software 23.1 and later, you may see some Quartus® Simulation Library source files not included for compilation for Siemens* Questasim* Tool selection. This problem persists on both EDA Simulation Library Compiler GUI and command line versions. This problem only exists in Quartus® Prime Standard Edition and does not affect Quartus® Prime Pro Edition versions. Resolution To work around this problem, follow these steps: 1. Edit file: <QUARTUS INSTALLATION DIRECTORY>/quartus/common/tcl/internal/simlib_comp.tcl 2. Replace: set gl(primary_tool,questasim) questasim With: set gl(primary_tool,questasim) modelsim This problem is scheduled to be fixed in a future release of the Quartus® Prime Standard Edition Software.76Views0likes0CommentsWhy does the outclk of the ALTCLKCTRL IP remain enabled when using the ENA input in External Path mode?
Description Due to a problem in the Quartus® Prime Standard Edition Software version 22.1 or earlier, you might see that the output clock of the ALTCLKCTRL IP remains enabled regardless of whether the ENA input is asserted or de‑asserted when using the “External path” mode. This problem occurs because the ENA input port is not used in “External path” mode even if the “Create ‘ena’ port to enable or disable the clock network driven by this buffer” option is selected. Beginning with the Quartus® Prime Standard Edition Software version 23.1, the software will generate an error message indicating that the “Create ‘ena’ port” option is unavailable when the “External path” type is selected. Resolution To work around this problem using the ALTCLKCTRL IP with the “External path” mode: Disable the “Create ‘ena’ port to enable or disable the clock network driven by this buffer” option in the Parameter Editor. If you require clock gating, implement the gating logic external to ALTCLKCTRL (for example, gate the source clock or use an alternate supported clock‑control scheme) rather than relying on the ALTCLKCTRL ENA port in “External path” mode.37Views0likes0CommentsWhy does Quartus® Prime Standard Edition Software v24.1 hang and fail to close after using the Programmer?
Description Due to a problem in the Quartus® Prime Standard Edition Software version 24.1 and later, the Quartus® Prime Standard Edition Software might become unresponsive and fail to close after running the Quartus® Prime Programmer on Windows* 10 environments. The typical sequence that triggers the hang is: Launch the Quartus® Prime Standard Edition Software. Launch the Quartus® Prime Programmer from within the Quartus® Prime Standard Edition Software and complete programming. Close the Quartus® Prime Programmer. Attempt to close the Quartus® Prime Standard Edition Software. Result: Windows shows “Not Responding” and the application must be forcibly terminated. Resolution To work around this problem in the Quartus® Prime Standard Edition Software version 24.1, download and install the patch below: This problem is scheduled to be fixed in a future release of the Quartus® Prime Standard Edition Software.74Views0likes0Comments