Knowledge Base Article
What is the GPIO pin state after full power-up and before configuration mode for MAX® 10 FPGA devices?
Description
For MAX® 10 FPGA devices, GPIO pins are typically tri-stated with weak pull-up enabled after full power-up and before configuration mode, except for the pin identified in the table below for each device package. That pin is tri-stated without weak pull-up enabled during this period, but it functions correctly in user mode.
|
Device |
Package | ||||||
|
Type |
Y180 180-pin WLCSP |
M153 153-pin MBGA |
U169 169-pin UBGA |
U324 324-pin UBGA |
B610 610-pin VPBGA |
E144 144-pin EQFP | |
|
10M02 |
— |
D7 |
E6 |
C5 |
— |
128 | |
|
10M04 |
— |
D7 |
E6 |
C5 |
— |
132 | |
|
10M08 |
— |
D7 |
E6 |
C5 |
— |
132 | |
|
10M16 |
A5 |
— |
E6 |
C5 |
— |
132 | |
|
10M25 |
— |
— |
— |
— |
— |
132 | |
|
10M40 |
— |
— |
— |
— |
P18 |
133 | |
|
10M50 |
— |
— |
— |
— |
P18 |
133 | |
|
Device |
Package | |||||
|
Type |
U324 324-pin UBGA |
F256 256-pin FBGA |
B610 610-pin VPBGA |
F484 484-pin FBGA |
F672 672-pin FBGA | |
|
10M02 |
C5 |
— |
— |
— |
— | |
|
10M04 |
C5 |
B5 |
— |
— |
— | |
|
10M08 |
C5 |
B5 |
— |
E8 |
— | |
|
10M16 |
C5 |
B5 |
— |
E8 |
— | |
|
10M25 |
— |
B5 |
— |
E8 |
— | |
|
10M40 |
— |
B5 |
P18 |
E8 |
E10 | |
|
10M50 |
— |
B5 |
P18 |
E8 |
E10 | |
Resolution
This is expected behavior. If your system depends on the GPIO pin state during this period, consider adding an external pull-up resistor to the pin or selecting a different GPIO pin in your design.