Creating PCB based on 10M08 Evaluation Board but with other MAX10 FPGA
Hello everyone, for a school project, I want to design a PCB for / around the MAX 10 FPGA. As I'm trying to make my life easier, I am using this (https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/max/10m08-evaluation-kit.html) Intel Evaluation Board as a starting point. the FPGA used in the design is the 10M08SAE144C8G. However, it has only 8000 LE, which will not be enough, therefore I'm planning to use 10M16SAE144C8G as a (hopefully) drop in replacement. I think that this will work, why shouldn't it? All it really is, is a PCB which uses the same layout, but with more of the available GPIOs broken out and preferable the mentioned 10M16SAE144C8G (or even 10M25SAE144C8G). I checked the pinout of both FPGAs and they are the same. Also programming should be the same as far as i know. Thanks for reading!
writing and reading max10 ufm
hii i have the neek dev kit , and i did a project to write and read the max10 ufm i see in the signal tap in my project that i can write the data and read successfully i programmed the board with the pof so that my firmware is inside the board , but when i turn off the board and turn it on again , and read the data from ufm i see that the data is all zeros meaning that the data didn't get saved in the ufm , and i know that the ufm is non volatile memory . i am using the on chip flash ip , i expect the data to be saved in the ufm . when i program the pof and perform the write and the do the read while the board under power everything is ok , data get written and read . but the problem start when i turn the power down do i need to do a special thing in order to commit the data to the ufm and save so i can read it after power up ???
Intel FPGA AI Sutie Inference Engine
Is there any official documentation on the DLA runtime or inference engine for managing the DLA from the ARM side? I need to develop a custom application for running inference, but so far, I’ve only found the dla_benchmark (main.cpp) and streaming_inference_app.cpp example files. There should be some documentation covering the SDK. The only documentation that i found related with is the Intel FPGA AI suite PCIe based design example https://www.intel.com/content/www/us/en/docs/programmable/768977/2024-3/fpga-runtime-plugin.html From what I understand, the general inference workflow involves the following steps: Identify the hardware architecture Deploy the model Prepare the input data Send inference requests to the DLA Retrieve the output dataIntel FPGA AI Suite Inference Engine
Hello, I'm using Intel FPGA AI 2023.2 on ubuntu 20.04 host computer and trying to infer a custom CNN in a Intel Arria 10 SoC FPGA. I have followed Intel FPGA AI Suite SoC Design Example Guide and I'm able to copile the Intel FPGA AI suite IP and run the M2M and S2M examples. I have also compiled the grpah for my custom NN and I'm trying to run it with the Inter FPGA AI suite IP but I have not clear how to do it. I'm trying to use the dla_benchmark app provided but for example, the input data of my NN (it is trained and graph was compiled in this way) must be float whereas the input data of the IP must be int8 if I'm not wrong. Another problem I have is regarding the ground truth file. I have a ground truth file for each imput file because each groud truth is a 225 array. Is there any additional information or guide to run custom model with Intel FPGA AI Suite? Thank you in advance
Error running DLA Benchmark
Hello, I am working with Intel FPGA AI suite on a Intel Arria 10 SoC Dev Board. I tried to run DLA benchmark several times and I receive the following messages after some inferences: "void MmdWrapper::WriteToDDR(int, uint64_t, uint64_t, const void*) const: Assertion `status == 0' failed" The error comes after run the benchmark about 400 times Intel FPGA AI Suite version: 2023.2 Running custom NN over A10_FP16_Performance.arch example. Could anyone help me to avoid this problem? Thank you in advance.