Why does the Quartus® Prime Pro Edition software version 26.1.1 report Error (25640) when an Agilex® 5 FPGA GTS regional reference clock drives 16 transceiver channels?

Description

In the Quartus® Prime Pro Edition software version 26.1, an Agilex® 5 FPGA D-Series transceiver design may compile when a single GTS regional reference-clock pin drives 16 transceiver channels across four GTS quads.

Starting with the Quartus Prime Pro Edition software version 26.1.1, the Fitter reports Error (25640) for the reference-clock input. The error indicates that the reference clock drives 16 transceiver channels, exceeding the allowed limit of 12 channels.

The same user RTL, SDC, and pin assignments can therefore compile in version 26.1 and fail in version 26.1.1.

Resolution

This problem is scheduled to be fixed in a future release of the Quartus Prime Pro Edition software.