Why does the PHY Lite for Parallel Interfaces Intel® Stratix® 10 FPGA IP cannot be assigned to Bank 3A or 3D when using the Intel® Stratix® 10 1ST040*, 1SG040* and 1SX040* devices?

Description

Due to the limitation of the Intel® Stratix® 10 1ST040*, 1SG040*, and 1SX040* devices, you will see hardware failure if you assign the PHY Lite for Parallel Interfaces Intel® Stratix® 10 FPGA IP to Bank 3A or 3D in the Intel® Quartus® Prime Pro Edition Software version 19.3. 

Resolution

To avoid this problem, do not assign the PHY Lite for Parallel Interfaces Intel® Stratix® 10 FPGA IP to Bank 3A or 3D for Intel® Stratix® 10 1ST040*, 1SG040* and 1SX040* devices.