Why does the P-Tile Debug Toolkit display lanes 8 – 15 registers in the P0 Configuration Space of a design configured in x8x8 mode ?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.2, lanes 8 – 15 registers are displayed in the P0 Configuration Space of a design configured in x8x8 mode. P0 Configuration Space should display lanes 0 – 7 registers only. Ignore the lane 8 – 15 registers.

Resolution

A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 21.2.
Download and install Patch 0.23 from the appropriate link below.

• Download the patch Intel® Quartus® Prime Pro Edition version 21.2 Patch 0.23 for Windows (.exe)
• Download the patch Intel® Quartus® Prime Pro Edition version 21.2 Patch 0.23 for Linux (.run)
• Download the Readme for Intel® Quartus® Prime Pro Edition version 21.2 Patch 0.23 (.txt)

This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 21.3.