Why does the HDMI FPGA IP Design Example fail to generate when selecting the board option to Custom Development Kit?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 23.4, the following error will appear when generating HDMI FPGA IP Design Example when  selecting the board option to Custom Development Kit:

Tcl error: ERROR: Value "OSC_CLK_1_" for "DEVICE_INITIALIZATION_CLOCK" assignment is illegal. Specify a legal value.

       

Resolution

To work around this problem, please follow the steps below:

Users can select the No Development Kit option instead of Custom Development Kit.
The generated design will remain the same, but the user must update the PIN assignment in the QSF file.

This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 24.1.