Why does DDR calibration fail on Intel® Arria® 10 SoCs when using early I/O release?

Description

Due to a problem in the Intel® Quartus® Prime Software version 16.0 and earlier, RZQ pins for Intel® Arria® 10 SoC designs can be located on I/O banks not enabled for early I/O release. DDR calibration will fail if the related RZQ pin is located on an I/O bank not enabled for early I/O release.

Resolution

To work around this problem, ensure RZQ pins for HPS External Memory Interfaces are located on I/O banks enabled for early I/O release.

This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Software

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