Why do the Intel® FPGA P-Tile Avalon® Streaming IP for PCI Express* Design Examples in Gen3 configurations fail setup timing on the xcvr_reconfig_clk ?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.2, the Intel® FPGA P-Tile Avalon® Streaming IP for PCI Express* Design Examples in Gen3 configurations fail xcvr_reconfig_clk setup timing when the P-Tile Debug Toolkit is enabled.
The timing violation does not affect the P-Tile Debug Toolkit results.

Resolution

A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 21.2.
Download and install Patch 0.23 from the appropriate link below.

• Download the patch Intel® Quartus® Prime Pro Edition version 21.2 Patch 0.23 for Windows (.exe)
• Download the patch Intel® Quartus® Prime Pro Edition version 21.2 Patch 0.23 for Linux (.run)
• Download the Readme for Intel® Quartus® Prime Pro Edition version 21.2 Patch 0.23 (.txt)

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3.