Riviera* Simulation Errors of the Intel® Stratix® 10 FPGA Avalon® Memory Mapped Interface for PCI Express* Solutions

Description

Due to a problem wih the ALDEC* Riviera* simulation tool, the following or similar error will be seen when simulating the Intel® Stratix® 10 FPGA Avalon® Memory Mapped Interface for PCI Express* IP.

SLPENFORCE: Fatal Error: AdvancedDcslOptimization.cpp (572): Internal fatal error

Resolution

No workaround is available when using the ALDEC* Riviera* simulation tool. This problem is not seen with other supported simulators.

This problem has been reported to ALDEC*. A fix is scheduled for a future release of the ALDEC* Riviera* simulation tool.