Knowledge Base Article

Performance Risk Running Triple Speed Ethernet LVDS in Arria 10 Devices

Description

There may be a performance risk if you use the Triple Speed Ethernet IP variant with LVDS I/O for PMA implementation in Arria 10 devices for Quartus Prime versions 17.0.2 and earlier.

Resolution

To avoid the performance risk, Intel® recommends that you regenerate the Triple Speed Ethernet IP core and recompile the design in the Intel Quartus® Prime software version 17.1 or later. Refer to the latest Triple Speed Ethernet User Guide version 17.1 for more information.

The following patch provides a solution to the Triple Speed Ethernet IP variant with LVDS I/O for PMA implementation in Intel Arria 10 devices for Intel Quartus Prime version 17.0.2. Download and install the appropriate patch from the following links:

Updated 6 days ago
Version 3.0
Arria® 10 FPGAs and SoCs
critical
fpga dev tools quartus® prime software pro
troubleshooting
No CommentsBe the first to comment