Honored ContributorIs anyone aware of some sample HDL code that accesses the DE2 USB chip (ISP1362) as a Device WITHOUT NIOS or any other processor implementation? In other words, by just programming a Verilog or VHDL state machine to access the chip?
Honored ContributorHonored Contributormzakharo, no, it's never too late. It appears you have done an excellent job here. At some point I switched over to the Saxo-L board from KNJN with a smaller, but adequate, Cyclone and an easier USB device. But I am very interested in your code. Thank you!
Honored ContributorOh cool - this board is using a very neat USB controller, I like the implementation of FIFO interface to the USB chip:
http://www.knjn.com/docs/knjn%20fx2%20fpga%20boards.pdf - section 13. Maybe the Altera DE-2 project I/O interface can be extended to use something like it. Right now I think the I/O interface is a bit lacking in flow-control features.Honored Contributor
