Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorSDRAM on DE2
Hi friends:
I come up with a problem on DE2 board.In the SOPC builder,I set the clock of both SDRAM and CPU 50Mhz,when I download the software in Nios,it said "Verify failed between address 0x800000 and 0x8062B3,Leaving target processor paused",then I change the clock of CPU to 100Mhz,and the problem was solved,do you know why this happened?15 Replies
Altera_ForumI'm stack with this sdram controller:/ Did everything what I found in this forum and still it doesn't work:/
- Altera_Forum
This my configuration sdram controller for nios.
http://aix.vot.pl/nios/cpu.jpg http://aix.vot.pl/nios/nios.jpg http://aix.vot.pl/nios/sdram1.jpg http://aix.vot.pl/nios/sdram2.jpg - Altera_Forum
I found the solution. I had to use 2 clock signals from pll. One for sdram and one for fpga. Then it works.
- Altera_Forum
this problem is generic for using sdram~!
I think a phase shift between SDRAM Controller's clock and SDRAM Chip's clock! I setup phaseshift is -3000(dg)!
