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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

SDRAM on DE2

Hi friends: I come up with a problem on DE2 board.In the SOPC builder,I set the clock of both SDRAM and CPU 50Mhz,when I download the software in Nios,it said "Verify failed between address 0...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I found the solution. I had to use 2 clock signals from pll. One for sdram and one for fpga. Then it works.