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Altera_Forum's avatar
Altera_Forum
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12 years ago

Problem with Printf

I ve written a simple C-program running on Nios with output on JTAG-Uart Console.

Why if the surce code is

int m;

m=9;

printf("%d",m);

everthing works perfectly while if the source code is modified in:

int m;

m=10;

printf("%d",m);

it does not work anymore ???

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    moreover

    please note that this strange behaviour occours using Nios II(e),

    while using Nios II(s) everithing works well.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Hi, telle us more information

    for your 1st problem,

    What did you get ? "9" on nios2-terminal instead of 10 ? if so, clean and rebuild your nios project.

    Maybe the new soft was not correctly downloaded, did you get errors ?

    For your 2nd problem,

    When you chose Nios II/e (=economic version), do you regenerate the Qsys, recompile the design, redownload to FPGA, do you rebuild the BSP, do you recompile the soft ?

    regards
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Thank you for your answer

    The code is exactly what I write !

    If I ask "printf" to write a integer number (%d) with a single digit it works correctly,

    otherwise (just changing the 9 in 10) the program restart from the begin in a infinite loop.

    Actually I've similar problem also using the multiplier (*) operator: sometimes it work but with few marginal

    changing in the code, the execution restart from the beginning in an infinite loop.

    However I noticed that this problem is limited to the usage of Nios II-e, while just changing the processor to Nios II-s and with no other modification

    both the "printf" and the "multiplier" works correctly.

    > When you chose Nios II/e (=economic version), do you regenerate the Qsys, recompile the design, redownload to FPGA, do you rebuild the BSP, do you recompile the soft ?

    Of course !