Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Audio UP 9.0 Problem

Hi,

De2 board..

I'm trying to feed the buffers with;

writenR= alt_up_audio_write_fifo (audio_dev, buff_pointer, 1800, ALT_UP_AUDIO_RIGHT);

writenL= alt_up_audio_write_fifo (audio_dev, buff_pointer, 1800, ALT_UP_AUDIO_LEFT);

I'm printing writenR and writenL. First loop I get 128 back, and rest of the loops, 0.

No sound is coming from lineout.

I haven't got the example linein->lineout to work either... It seems like it isn't processing my FIFO's.

I have added audio core, audio and video config, and external clocks in SOPC.

Where does the system_clk_from_de_boards_0 go? I know XCK goes to board XCK, but the output system_clk from the external clocks?

Picture from my SOPC builder:

imgbin.org/index.php?page=image&id=1596

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    I also come from this question, and hope someone can give some answers ...:)

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    This is the clock that must loop-back to the Nios Master clock

    In your scheme the sys_clk must drive only the ext_clk_50_to_de_boards_0 and the sys_clock_from_de_board_0 must be connected to clk_0.