Forum Discussion

Qais7's avatar
Qais7
Icon for New Contributor rankNew Contributor
5 years ago

4-bits universal binary counter

Write a VHDL code to design a universal binary counter  Assign the I/O ports to the boards I/O pins as follows: Design I/O port Board I/O pin Clock (clk) CLK_50M Enable (en) V_SW(0) Count up (...
Qais7's avatar
Qais7
Icon for New Contributor rankNew Contributor
5 years ago

@EngWei_O_Intel

I want a VHDL code to design a universal binary counter and apply it on FPGA at LabsLand

if you can help me

Thank you.

EngWei_O_Intel's avatar
EngWei_O_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi Qais

There are few links from Intel providing design example for counter as below:

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/hdl/vhdl/vhdl_pro_counters.htm

https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/vhdl/vhd-counter-synch.html

https://fpgacloud.intel.com/devstore/platform/

Else, you can also search for 3rd party design and modify per your usage.

Thanks.

Eng Wei

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    5 years ago

    Hi Qais

    We do not receive any response from you to the previous answer that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

    Eng Wei