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MCETIN's avatar
MCETIN
Icon for New Contributor rankNew Contributor
7 years ago

Why can not my u boot configure DRAM? (external fpga config)

Dear all, I have a question about the U-boot. Using the hardware board is designed by myself. The SoC is 10AS066N2. The U-Boot runs perfectly when the fpga configured from u-boot from QSPI flash. ...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

Based on the u-boot log, it seems that your DDR is not calibrated successfully. DDR calibration failure will sometimes causing the resetting CPU.. loop.

When you mentioned, "The U-Boot runs perfectly when the fpga configured from u-boot from QSPI flash" correct me if I am wrong, you are seeing the DDR calibration has passed and able to go to u-boot and able configure the FPGA?