where can I find the HAL for the peripherals in FPGA when i use the A10 SOC FPGA?
hi,
in previous i used the Nios II in cyclone FPGA and after the SOPC genertated the nios ii eclipse tools will auto generate the HAL for the peripherals in FPGA, i can then use them in my app.
Now i am using the A10 SOC board for booard bring up test with the GHRD, but in the bare metal examples, after i imported the Altera-SoCFPGA-HardwareLib-Timer-A10-GNU into workspace and built it, i can only find the hwlib which only includes the peripherals in the HPS,
and i have not find the hardware abstract layer which describes the pheripherals in the FPGA(as showed in below image with red highlighted)
so i have to write the related HAL by myself as below image shows.
My question: can the new workflow for A10 SOC still auto generate the HAL for periperals in FPGA? how to find or use them?
thanks!
in fact, i just need the instructions as below iamge shows, and i found it on HOWTO Create a Devicetree for Arria 10 SoC | Documentation | RocketBoards.org
thank you for the support!