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PWeis4's avatar
PWeis4
Icon for New Contributor rankNew Contributor
6 years ago

u-boot and FPGA to HPS SDRAM bridge, removed reset bridge in source code

Hello, we want to use the FPGA to HPS SDRAM bridge in our u-boot linux environment. We use the altera u-boot-socfpga uboot. Every first time the kernel hang/crashes, if we want to write trough the...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I apologize, were you using the latest version of Quartus and SoC EDS? For Cyclone V SoC it should be the 18.1 std.

May I know how did you generate your preloader and u-boot?