Forum Discussion
Hello Ihsan
If you have changes in your hardware design and don't want to run again Yocto, to create the SD Card image with the .core.rbf inside, there are a couple of options:
1) You can Update the kernel.itb (with the new .core.rbf) manually and then update manually the SD Card image following the instructions in:
- https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-7/m-series/hbm2e/ug-gsrd-agx7m-hbm2e/#how-to-manually-update-the-kernelitb-file
- https://altera-fpga.github.io/rel-25.1/embedded-designs/agilex-7/m-series/hbm2e/ug-gsrd-agx7m-hbm2e/#how-to-manually-update-the-content-of-the-sd-card-image
Note that the kernel.itb is created with several components as described in https://www.rocketboards.org/foswiki/Documentation/SingleImageBoot#A_42Linux_DTB_patch_with_location_of_SPT0_42
2) You can load the new .core.rbf into SDRAM from U-Boot using TFTP (you need to set up a TFTP Server in your development machine) and perform the FPGA configuration also from U-Boot and then launch Linux following the next steps:
# setenv autoload no
# dhcp
# setenv serverip <your development machine IP>
# tftp ${loadaddr} <your .core.rbf>
# dcache flush
# fpga load 0 ${loadaddr} ${filesize}
# bridge enable
# setenv bootargs "early panic=-1 root=${mmcroot} rw rootwait";
# fatload mmc 0:1 ${loadaddr} kernel.itb
# bootm ${loadaddr}#board-0;
In this 2nd option you boot to Linux using board0 configuration which let U-boot know that it doesn't need to perform FPGA configuration because it was already done (if you use board-4 configuration, bootm will perform the FPGA configuration again using the .core.rbf inside the kernel.itb which will be the old core.rfb).
The .core.rbf that you configure corresponds to the 2nd phase of the fabric design. The new 1st phase still need be included in the HPS rbf as indicated next:
Thanks
Rolando